A well known source of non-linear distortion in Class-D amplifiers is blanking delay, also known as dead time delay. In the following the switching devices of the amplifier will throughout be described as MOSFETs (metal-oxide-semiconductor field-effect transistors), but it is readily understood that also other devices and switching technologies could be used.
In the following the term dead time delay and the effect hereof will be described in some detail.
In a switched amplifier output stage it is not allowed that both MOSFETs are on, i.e. conducting, simultaneously as this would result in short-circuiting the power supply (as state that is known as “shoot through”). If a large electrical current is flowing through the MOSFETs it will normally require a relatively longer time to turn on the MOSFET and a relatively shorter time to turn it off. This results in a variation of the exact time at which turning on and off takes place, and hence in order to avoid shoot through it is necessary to provide a safety interval in which none of the MOSFETs are conducting. This time interval is known as dead time or blanking delay.
The effect of dead time delay is as follows:
During the dead time, none of the power devices (MOSFETs) are conducting. Factors controlling the voltage in the switching node, i.e. the node between the drain terminal of one MOSFET and the source terminal of the other MOSFET, will be the capacitance in the node (including snubbers), inductor current (=load current+capacitor ripple current) and body diodes in the MOSFETs. As switching frequency is several times higher than the LC filter frequency, the inductor current will be relatively stable during a switching cycle, at least at high output current.
A main thing to understand here is that as the amplifier switching node is switching both positive and negative no matter if the output voltage and current is positive or negative. Therefore the low side is regularly on, even when output is positive, resulting in that a current is flowing out of the amplifier in the source to drain direction of the low side MOSFET.
The document: “Time domain analysis of open loop distortion in Class-D amplifier output stages” by Nyboe, Risbo and Andreani, 27th international AES conference, dead time delay and the effect of dead time delay is described in detail. The document among other explains how the distortion can be minimized by using carefully selected dead time, ripple current and turn on/off time. In that case the optimized dead time error can in some cases be made linear with output current (in the case of constant switching frequency), appearing like an additional output resistance. However, for a self-oscillating feedback loop like in most high-performance Class-D amplifiers today, the linear delay will still cause distortion.
The described method has some drawbacks, especially for solutions where the MOSFETs are not integrated:
It will typically require very short dead-time, increased snubbers, high ripple current and soft turn on/off, all of which reduces efficiency.
Turn-on and off time is often dictated by EMI (electromagnetic interference), where a slow turn on is advantageous for obtaining low EMI. Contrary to this, fast turns on and off is advantageous for obtaining high efficiency. Miller effect in the MOSFETs can make weak turn on/off a problem, where the OFF condition MOSFET can be turned on by the Miller capacitor in the MOSFET combined with the flank from the opposite FET turning on, or the ON condition MOSFET can be turned OFF temporarily by its rising flank. This unintended short time turn-on, in the case where the MOSFET should be off has a very detrimental effect on EMI and efficiency, whereas the unintended turn-off while the MOSFET is on is also detrimental for EMI and efficiency for the same reason, although to a lesser extent.
The output filter ripple current will be restricted by capacitive load stability, power dissipation, and loop design. A high ripple current will increase idle loss (like increased snubbers). Idle loss is a weak spot in Class-D amplification, where solutions like varied supplies (Class-G) are considered to reduce idle consumption.
When the system is optimized, larger snubbers, higher ripple current, softer turn on/off will all reduce efficiency and increase idle losses, which, to some extent, contradicts the general idea of Class-D.
Other prior art solutions suggest correcting the delay variation by digital prediction. As the delay variation is dependent on current, and the modulator output is a duty cycle output, controlling output voltage, this correction will only be correct in the case the load impedance and un-linearity is totally well-known by the pre-compensating system, typically a resistive load. These solutions will function well under ideal conditions, but with the highly non-linear and frequency dependent load that a real loudspeaker poses, the correction will be incorrect.
US 2013/0193938 describes a simple means for dead-time compensation in a power supply system that, however, suffers from three major pitfalls:
Firstly, there is only correction of the positive pulse is carried out. It is a system for single polarity voltage supply and not suitable for single polarity voltage supply audio (BTL) either, as this would also require correction of low side pulse. Correcting both sides add more complexity than just adding the same circuit for the negative side.
Secondly, the system is a step-based system, with one logic block for each step. It is a counter based system. The dead-time seen in audio amplifiers will be in the 10-40 ns range, and would require time resolution of at maximum 1 ns, preferably better. This is not possible given the described architecture. Only an analogue system will have sufficient resolution.
Finally, the system does not compensate for the delay in level shifters, gate drive and power stage. The entire delay from rising edge of input signal through the gate driver and to the output of the power switching node is added to the end of the high side pulse, thereby adding substantially too much time. This will generate a severe offset, especially as only the high pulses are corrected.
It would furthermore be possible to suppress non-linearity in Class-D amplifiers using suitable feedback loops in the circuit. However, feedback loops tend to lose their suppressing effect at higher frequencies.
Further, US 2005/0099226 describes a system that dynamically adjusts dead time adaptively to the limit of cross-conduction, indicated by a dynamic measurement of supply current. The dead time is dynamically reduced until cross-conduction is detected, then stepped back to a time just before cross conduction. However, in larger output stages with longer gate transition times, the actual output stage switching time will still depend on load current, which is not contemplate in this document. Reverse recovery in the conducting body diode also adds substantial current dependent delay, which is also not considered in this document.
On the above background, there is a need for a simple means of reducing the detrimental effects of dead time and other signal dependent delays like reverse recovery time in a Class-D amplifier which also is cost-efficient and easy to implement, especially in self oscillating Class-D amplifiers.